A Low Power Translinear-Based CMOS Analog Multiplier

Authors

  • Harshmani Yadav Student, Department of Electronics and Communication Engineering, Netaji Subhas University of Technology, New Delhi, India
  • Manish Rai Student, Department of Electronics and Communication Engineering, Netaji Subhas University of Technology, New Delhi, India
  • Nitin Kumar Student,Rajdhani College, University of Delhi, Department of Physics, Delhi, India
  • Mahesh C Meena Student, Rajdhani College, University of Delhi, Department of Physics, Delhi, India
  • Abhay Kumar Student, Department of Electronics Science, Delhi University, Delhi, India
  • Anup Kumar Student, Department of Electronics and Communication Engineering, Netaji Subhas University of Technology, New Delhi, India

Keywords:

Power consumption, Low voltage, Translinear loop, FGMOS

References

Razavi, & Behzad. Design of Analog CMOS Integrated Circuits. Tsinghua University Press, 2005.

Choi J, Park J, Kim W, Lim K, Laskar J. High multiplication factor capacitor multiplier for an on-chip PLL loop filter. Electronics Letters. 2009 Feb 26;45(5):239-40.

Sotner R, Jerabek J, Prokop R, Vrba K. Current gain controlled CCTA and its application in quadrature oscillator and direct frequency modulator. Radioengineering. 2011 Apr 1;20(1):317-26.

Published

2026-02-03

Issue

Vol. 12 No. 3&4 (2025): Journal of Advanced Research in Instrumentation and Control Engineering

Section

Research Article