Advancements in Asynchronous Circuit Design: A Comprehensive Overview

  • Shivam Sharma BS Abdur Rahman Crescent Institute of Science and Technology, Chennai

Abstract

This article explores the advancements and applications of asynchronous circuit design in the realms of processor, co-processor, multi-processor, and memory architectures. Departing from traditional synchronous systems, asynchronous circuits operate without a global clock, providing benefits such as enhanced power efficiency, reduced latency, and improved performance predictability. Asynchronous processor designs offer dynamic power consumption, making them suitable for real-time applications and embedded systems. The integration of asynchronous co-processors and multi-processor architectures further extends the advantages of this design philosophy, enabling parallel processing and specialized task acceleration. Additionally, asynchronous memory design contributes to overall system efficiency by minimizing latency and optimizing data transfer rates. Despite challenges in design complexity, the article emphasizes the potential of asynchronous circuit design in shaping the future of computing, with ongoing research focused on addressing current limitations and advancing the adoption of this innovative approach.

References

1. Abidi AA, Pottie GJ, Kaiser WJ. Power-conscious design of wireless circuits and systems. Proceedings of the IEEE. 2000 Oct;88(10):1528-45.
2. Renaudin M. Asynchronous circuits and systems: a promising design alternative. Microelectronic engineering. 2000 Dec 1;54(1-2):133-49.
3. National Research Council. The future of computing performance: Game over or next level?. National Academies Press; 2011 Apr 21.
4. Stevens KS, Golani P, Beerel PA. Energy and performance models for synchronous and asynchronous communication. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2010 Feb 17;19(3):369-82.
5. Camposano R, Wilberg J. Embedded system design. Design Automation for Embedded Systems. 1996 Jan;1:5-0.
6. Ax J, Kucza N, Vohrmann M, Jungeblut T, Porrmann M, Rückert U. Comparing synchronous, mesochronous and asynchronous NoCs for GALS based MPSoCs. In2017 IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) 2017 Sep 18 (pp. 45-51). IEEE.
7. Werner T, Akella V. Asynchronous processor survey. Computer. 1997 Nov;30(11):67-76.
8. Chang MC, Shiau DS. Design of an asynchronous pipelined processor. In2008 International Conference on Communications, Circuits and Systems 2008 May 25 (pp. 1093-1096). IEEE.
9. Bhadra D, Stevens KS. Design of a low power, relative timing based asynchronous MSP430 microprocessor. InDesign, Automation & Test in Europe Conference & Exhibition (DATE), 2017 2017 Mar 27 (pp. 794-799). IEEE.
10. Maier S, Hönig T, Wägemann P, Schröder-Preikschat W. Asynchronous abstract machines: anti-noise system software for many-core processors. InProceedings of the 9th International Workshop on Runtime and Operating Systems for Supercomputers 2019 Jun 17 (pp. 19-26).
11. Kamaleldin A, Hesham S, Göhringer D. Towards a modular RISC-V based many-core architecture for FPGA accelerators. IEEE Access. 2020 Aug 11;8:148812-26.
12. Kanekawa N, Ibe EH, Suga T, Uematsu Y. Dependability in electronic systems: mitigation of hardware failures, soft errors, and electro-magnetic disturbances. Springer Science & Business Media; 2010 Nov 8.
13. Tutorial A. Asynchronous Circuit Design. (https://core.ac.uk/download/pdf/13700921.pdf)
Published
2023-12-13
How to Cite
SHARMA, Shivam. Advancements in Asynchronous Circuit Design: A Comprehensive Overview. Journal of Advanced Research in Microelectronics and VLSI, [S.l.], v. 6, n. 2, p. 1-6, dec. 2023. Available at: <http://thejournalshouse.com/index.php/ADR-Microelectronics-VLSI/article/view/969>. Date accessed: 27 apr. 2024.